Op-Amp

Storage Circuits

A sample-and-hold circuit which combines the low input current of FET’s with the low offset voltage of monolithic amplifiers is shown in Figure 6. The circuit is a unity gain amplifier employing an operational amplifier and an FET source follower. In operation, when the sample switch, Q2, is

FIGURE 6. Low Drift Sample and Hold

Some care must be taken in the selection of the holding capacitor. Certain types, including paper and mylar, exhibit a polarization phenomenon which causes the sampled voltage to drop off by about 50 mV, and then stabilize, when the capacitor is exercised over a 5V range during the sample interval. This drop off has a time constant in the order of seconds. The effect, however, can be minimized by using capacitors with teflon, polyethylene, glass or polycarbonate dielectrics.

Although this circuit does not have a particularly low output resistance, fixed loads do not upset the accuracy since the loading is automatically compensated for during the sample interval. However, if the load is expected to change after sampling, a buffer such as the LM102 must be added be­tween the FET and the output.

A second pole is introduced into the loop response of the amplifier by the switch resistance and the holding capacitor, C2. This can cause problems with overshoot or oscillation if it is not compensated for by adding a resistor, R1, in series with the LM101 compensation capacitor such that the break­point of the R1C1 combination is roughly equal to that of the switch and the holding capacitor.

It is possible to use an MOS transistor for Q1 without wor­rying about the threshold stability. The threshold voltage is balanced out during every sample interval so only the short-term threshold stability is important. When MOS tran­sistors are used along with mechanical switches, drift rates less than 10 mV/min can be realized.

Additional features of the circuit are that the amplifier acts as a buffer so that the circuit does not load the input signal.

Storage Circuits (Continued)

The peak detector in Figure 7 is similar in many respects to the sample-and-hold circuit. A diode is used in place of the sampling switch. Connected as shown, it will conduct when­ever the input is greater than the output, so the output will be equal to the peak value of the input voltage. In this case, an LM102 is used as a buffer for the storage capacitor, giving low drift along with a low output resistance.

As with the sample and hold, the differential input voltage range of the LM101 permits differences between the input and output voltages when the circuit is holding.

on-Linear Amplifiers

hen a non-linear transfer function is needed from an op­erational amplifier, many methods of obtaining it present themselves. However, they usually require diodes and are therefore difficult to temperature compensate for accurate breakpoints. One way of getting around this is to make the output swing so large that the diode threshold is negligible by comparison, but this is not always practical. A method of producing very sharp, temperature-stable breakpoints in the transfer function of an operational ampli­fier is shown in Figure 8. For small input signals, the gain is determined by R1 and R2. Both Q2 and Q3 are conducting

to some degree, but they do not affect the gain because their current gain is high and they do not feed any appreciable current back into the summing mode. When the output volt­age rises to 2V (determined by R3, R4 and V^-), Q3 draws enough current to saturate, connecting R4 in parallel with R2. This cuts the gain in half. Similarly, when the output voltage rises to 4V, Q2 will saturate, again halving the gain. Temperature compensation is achieved in this circuit by including Q1 and Q4. Q4 compensates the emitter-base voltage of Q2 and Q3 to keep the voltage across the feed­back resistors, R4 and R6, very nearly equal to the output voltage while Q1 compensates for the emitter base voltage of these transistors as they go into saturation, making the voltage across R3 and R5 equal to the negative supply voltage. A detrimental effect of Q4 is that it causes the output resistance of the amplifier to increase at high output levels. It may therefore be necessary to use an output buffer if the circuit must drive an appreciable load.

Servo Preamplifier

In certain servo systems, it is desirable to get the rate signal required for loop stability from some sort of electrical, lead network. This can, for example, be accomplished with reac­tive elements in the feedback network of the servo preamplifier.

Many saturating servo amplifiers operate over an extremely wide dynamic range. For example, the maximum error signal could easily be 1000 times the signal required to saturate the system. Cases like this create problems with electrical rate networks because they cannot be placed in any part of the system which saturates. If the signal into the rate network saturates, a rate signal will only be developed over a narrow range of system operation; and instability will result when the error becomes large. Attempts to place the rate networks in

front of the error amplifier or make the error amplifier linear over the entire range of error signals frequently gives rise to excessive dc error from signal attenuation. These problems can be largely overcome using the kind of circuit shown in Figure 9. This amplifier operates in the linear mode until the output voltage reaches approximately 3V with 30 µA output current from the solar cell sensors. At this point the breakdown diodes in the feedback loop begin to conduct,

Servo Preamplifier (Continued)

drastically reducing the gain. However, a rate signal will still be developed because current is being fed back into the rate network (R1, R2 and C1) just as it would if the amplifier had remained in the linear operating region. In fact, the amplifier will not actually saturate until the error current reaches 6 mA, which would be the same as having a linear amplifier with a ±600V output swing.

Computing Circuits

In analog computation it is a relatively simple matter to perform such operations as addition, subtraction, integration and differentiation by incorporating the proper resistors and

capacitors in the feedback circuit of an amplifier. Many of these circuits are described in reference 5. Multiplication and division, however, are a bit more difficult. These operations are usually performed by taking the logarithms of the quan­tities, adding or subtracting as required and then taking the antilog.

At first glance, it might appear that obtaining the log of a voltage is difficult; but it has been shown⁶ that the emitter-base voltage of a silicon transistor follows the log of its collector current over as many as nine decades. This means that common transistors can be used to perform the log and antilog operations.

A circuit which performs both multiplication and division in this fashion is shown in Figure 10. It gives an output which is proportional to the product of two inputs divided by a third, and it is about the same complexity as a divider alone.

The circuit consists of three log converters and an antilog generator. Log converters similar to these have been de­scribed elsewhere,⁷ but a brief description follows. Taking amplifier A1, a logging transistor, Q1, is inserted in the feedback loop such that its collector current is equal to the input voltage divided by the input resistor, R1. Hence, the emitter-base voltage of Q1 will vary as the log of the input voltage E1.

A2 is a similar amplifier operating with logging transistor, Q2. The emitter-base junctions of Q1 and Q2 are connected in series, adding the log voltages. The third log converter pro­duces the log of E3. This is series-connected with the antilog transistor, Q4; and the combination is hooked in parallel with the output of the other two log convertors. Therefore, the emitter-base of Q4 will see the log of E3 subtracted from the sum of the logs of E1 and E2. Since the collector current of a transistor varies as the exponent of the emitter-base volt­age, the collector current of Q4 will be proportional to the product of E1 and E2 divided by E3. This current is fed to the summing amplifier, A4, giving the desired output.

Computing Circuits (Continued)

This circuit can give 1-percent accuracy for input voltages from 500 mV to 50V. To get this precision at lower input voltages, the offset of the amplifiers handling them must be individually balanced out. The zener diode, D4, increases the collector-base voltage across the logging transistors to improve high current operation. It is not needed, and is in fact undesirable, when these transistors are running at cur­rents less than 0.3 mA. At currents above 0.3 mA, the lead resistances of the transistors can become important (0.25Ω is 1-percent at 1 mA) so the transistors should be installed with short leads and no sockets.

An important feature of this circuit is that its operation is independent of temperature because the scale factor change in the log converter with temperature is compen­sated by an equal change in the scale factor of the antilog generator. It is only required that Q1, Q2, Q3 and Q4 be at the same temperature. Dual transistors should be used and arranged as shown in the figure so that thermal mismatches between cans appear as inaccuracies in scale factor (0.3-percent/˚C) rather than a balance error (8-percent/˚C). R12 is a balance potentiometer which nulls out the offset voltages of all the logging transistors. It is adjusted by setting all input voltages equal to 2V and adjusting for a 2V output voltage.

The logging transistors provide a gain which is dependent on their operating level, which complicates frequency compen­sation. Resistors (R3, R6 and R7) are put in the amplifier

output to limit the maximum loop gain, and the compensation capacitor is chosen to correspond with this gain. As a result, the amplifiers are not especially designed for speed, but techniques for optimizing this parameter are given in refer­ence 6.

Finally, clamp diodes D1 through D3, prevent exceeding the maximum reverse emitter-base voltage of the logging tran­sistors with negative inputs.

Root Extractor*

Taking the root of a number using log converters is a fairly simple matter. All that is needed is to take the log of a voltage, divide it by, say ¹⁄2 for the square root, and then take the antilog. A circuit which accomplishes this is shown in Figure 11. A1 and Q1 form the log converter for the input signal. This feeds Q2 which produces a level shift to give zero voltage into the R4, R5 divider for a 1V input. This divider reduces the log voltage by the ratio for the root desired and drives the buffer amplifier, A2. A2 has a second level shifting diode, Q3, its feedback network which gives the output voltage needed to get a 1V output from the antilog generator, consisting of A3 and Q4, with a unity input. The offset voltages of the transistors are nulled out by imbalanc-ing R6 and R8 to give 1V output for 1V input, since any root of one is one.

Note: *The “extraction” used here doubtless has origin in the dental opera­tion most of us would fear less than having to find even a square root without tables or other aids.

Q2 and Q3 are connected as diodes in order to simplify the circuitry. This doesn’t introduce problems because both op­erate over a very limited current range, and it is really only required that they match. R7 is a gain-compensating resistor which keeps the currents in Q2 and Q3 equal with changes in signal level.

As with the multiplier/divider, the circuit is insensitive to temperature as long as all the transistors are at the same temperature. Using transistor pairs and matching them as shown minimizes the effects of gradients. The circuit has 1-percent accuracy for input voltages be­tween 0.5 and 50V. For lower input voltages, A1 and A3 must have their offsets balanced out individually.

Frequency Compensation Hints

The ease of designing with operational amplifiers sometimes obscures some of the rules which must be followed with any feedback amplifier to keep it from oscillating. In general, these problems stem from stray capacitance, excessive ca-pacitive loading, inadequate supply bypassing or improper frequency compensation.

In frequency compensating an operational amplifier, it is best to follow the manufacturer’s recommendations. However, if operating speed and frequency response is not a consider­ation, a greater stability margin can usually be obtained by increasing the size of the compensation capacitors. For example, replacing the 30 pF compensation capacitor on the LM101 with a 300 pF capacitor will make it ten times less susceptible to oscillation problems in the unity-gain connec­tion. Similarly, on the LM709, using 0.05 µF, 1.5 kΩ, 2000 pF and 51Ω components instead of 5000 pF, 1.5 kΩ, 200 pF and 51Ω will give 20 dB more stability margin. Capacitor values less than those specified by the manufacturer for a particular gain connection should not be used since they will make the amplifier more sensitive to strays and capacitive loading, or the circuit can even oscillate with worst-case units.

The basic requirement for frequency compensating a feed­back amplifier is to keep the frequency roll-off of the loop gain from exceeding 12 dB/octave when it goes through unity gain. Figure 12a shows what is meant by loop gain.

The feedback loop is broken at the output, and the input sources are replaced by their equivalent impedance. Then the response is measured such that the feedback network is included.

Figure 12b gives typical responses for both uncompensated and compensated amplifiers. An uncompensated amplifier generally rolls off at 6 dB/octave, then 12 dB/octave and even 18 dB/octave as various frequency-limiting effects within the amplifier come into play. If a loop with this kind of response were closed, it would oscillate. Frequency com­pensation causes the gain to roll off at a uniform 6 dB/octave right down through unity gain. This allows some margin for excess rolloff in the external circuitry.

FIGURE 13. External Capacitances that Affect Stability

Some of the external influences which can affect the stability of an operational amplifier are shown in Figure 13. One is the load capacitance which can come from wiring, cables or an actual capacitor on the output. This capacitance w

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